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Title | Nintendo Ninja | An FPGA-Based Mario Bros. |
Description | A Hardware-Based FPGA AI for Super Mario Overview Design Results Conclusions Appendix Menu Intro Overview Design Results Conclusions Appendix A Hardware-Based FPGA AI for Super Mario Bros. Ninten |
Keywords | N/A |
WebSite | nintendoninja.com |
Host IP | 23.239.5.17 |
Location | United States |
Site | Rank |
US$350,398
Last updated: 2023-05-13 13:38:09
nintendoninja.com has Semrush global rank of 30,206,549. nintendoninja.com has an estimated worth of US$ 350,398, based on its estimated Ads revenue. nintendoninja.com receives approximately 40,431 unique visitors each day. Its web server is located in United States, with IP address 23.239.5.17. According to SiteAdvisor, nintendoninja.com is safe to visit. |
Purchase/Sale Value | US$350,398 |
Daily Ads Revenue | US$324 |
Monthly Ads Revenue | US$9,704 |
Yearly Ads Revenue | US$116,440 |
Daily Unique Visitors | 2,696 |
Note: All traffic and earnings values are estimates. |
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nintendoninja.com. | A | 3600 | IP: 23.239.5.17 |
nintendoninja.com. | AAAA | 3600 | IPV6: 2600:3c01::f03c:91ff:fe73:97c3 |
nintendoninja.com. | NS | 21600 | NS Record: ns-cloud-a1.googledomains.com. |
nintendoninja.com. | NS | 21600 | NS Record: ns-cloud-a4.googledomains.com. |
nintendoninja.com. | NS | 21600 | NS Record: ns-cloud-a3.googledomains.com. |
nintendoninja.com. | NS | 21600 | NS Record: ns-cloud-a2.googledomains.com. |
Overview Design Results Conclusions Appendix Menu Intro Overview Design Results Conclusions Appendix A Hardware-Based FPGA AI for Super Mario Bros. Nintendo Ninja is a final project for ECE5760 (Advanced Microcontroller Design) at Cornell University . The project was developed by Jeremy Blum , Sima Mitra , and Jason Wright in the 2013 Spring Semester. This project is Open Source . Overview Cramming a Cyclone II... ...into Mario’s Brain. We built an FPGA-based AI that uses video input from an NES console to automatically play the game Super Mario Bros. All of the video analysis and AI techniques are performed using Verilog-compiled hardware running on an Altera DE2 Cyclone board. The project combines NTSC decoding, VGA output, kernel-based pattern matching, real-time image manipulation, and NES controller emulation. Below, we explain the system design , our results , our conclusions , and useful appendices . The following video shows a demo of the system working. Watch the Video! |
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